DocumentCode
3381429
Title
The relationship between transistor-based and circuit-based reliability assessment for digital circuits
Author
Vaidyanathan, Balaji ; Bai, Shawn ; Oates, Anthony S.
Author_Institution
R&D, Technol. Reliability Phys. Dept., Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
fYear
2011
fDate
10-14 April 2011
Abstract
Logic, analog, RF, SRAM, and DRAM circuits respond differently to NBTI and HCI induced time dependent parametric shifts. We analyze digital logic susceptibility to these transistor degradation mechanisms and identify the benefits of simulation based aging-induced reliability assurance at the product level.
Keywords
digital circuits; hot carriers; logic circuits; semiconductor device reliability; transistors; NBTI; aging-induced reliability assurance; circuit-based reliability assessment; digital circuit; digital logic susceptibility analysis; hot carrier injection; transistor degradation mechanism; transistor-based reliability assessment; transistors; Integrated circuit modeling; Random access memory; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2011 IEEE International
Conference_Location
Monterey, CA
ISSN
1541-7026
Print_ISBN
978-1-4244-9113-1
Electronic_ISBN
1541-7026
Type
conf
DOI
10.1109/IRPS.2011.5784562
Filename
5784562
Link To Document