Title :
New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification
Author :
Oliveira, J.P. ; Goes, J. ; Paulino, N. ; Fernandes, J. ; Paisana, J.
Author_Institution :
Fac. de Cienc. e Tecnol., UNINOVA, Setubal
fDate :
Aug. 31 2008-Sept. 3 2008
Abstract :
In this paper a new time-interleaved 1.5-bit MDAC circuit is proposed. This circuit is well suited to be used in ultra low-power high-speed 4-to-8 bits pipeline ADCs. The required gain of two is implemented by switching a MOS capacitor from inversion into depletion within a clock-cycle. Low-power is achieved since no operational amplifiers are required but, instead, simple source-followers are used. Simulation results of a complete front-end stage of a 6-bit 2-channel pipeline ADC demonstrate the efficiency of the proposed technique.
Keywords :
MOS capacitors; analogue-digital conversion; digital-analogue conversion; MOS capacitor amplification; low-power time-interleaved MDAC; pipeline ADC; Capacitance; Circuit simulation; Clocks; Energy resolution; MOS capacitors; Pipelines; Power amplifiers; Power supplies; Sampling methods; Variable structure systems;
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
DOI :
10.1109/ICECS.2008.4674838
