Neutron- and alpha-particle induced soft-error rates for flip flops at a 40 nm technology node

Flip-flop designs fabricated in a 40 nm bulk technology node with a wide range of soft-error hardness, area, power, and speed have been tested for neutron and alpha single event upsets. Neutron results show that the error rates of flip-flop designs that were considered hardened at older technologies are comparable to that of the conventional D-flip-flop. The soft-error rates (SER) of all the flip-flops consistently increase with reduction in supply voltage and increase in ambient temperature.