Piecewise linear curvature-compensated CMOS bandgap reference

Author

Huang, Hong-Yi ; Ru-Jie Wang ; Hsu, Shih-Chiang

Author_Institution

Grad. Inst. of Electr. Eng., Nat. Taipei Univ., Taipei

fYear

2008

fDate

Aug. 31 2008-Sept. 3 2008

Firstpage

308

Lastpage

311

Abstract

A low-voltage low-power bandgap voltage reference without using passive components is presented. Using piecewise linear curvature-compensated scheme, a reference voltage of 646.4 mV is generated with a temperature coefficient of 1.7 ppm/degC in the range [-40, +125] degC at 1.8-V supply voltage. A line sensitivity of 0.18 mV/V in the supply voltage range [+1, +1.8] V is achieved. It dissipates a maximum power of 4.4 muW at a 1.8-V supply voltage and 125 degC. The silicon area is 100 times 50 mum² in 0.18um CMOS process.

Keywords

CMOS integrated circuits; elemental semiconductors; low-power electronics; piecewise linear techniques; silicon; CMOS; Si; bandgap voltage reference; line sensitivity; low power; piecewise linear curvature-compensated scheme; silicon area; size 0.18 mum; temperature -40 degC to 125 degC; voltage 1.8 V to 1 V; voltage 646.4 mV; CMOS process; Circuits; Feedback loop; MOSFETs; Operational amplifiers; Photonic band gap; Piecewise linear techniques; Resistors; Temperature distribution; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on

Conference_Location

St. Julien´s

Print_ISBN

978-1-4244-2181-7

Electronic_ISBN

978-1-4244-2182-4

Type

conf

DOI

10.1109/ICECS.2008.4674852

Filename

4674852