DocumentCode :
3382318
Title :
Performance evaluation modeling for reconfigurable processor
Author :
Liang, Shuang ; Yin, Shouyi ; Yin, Chongyong ; Liu, Leibo ; Wei, Shaojun
Author_Institution :
Res. Center for Mobile Comput., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
570
Lastpage :
573
Abstract :
Performance evaluation is very important for reconfigurable processor, for we can estimate the approximate performance before we actually run a program on the system hardware. In this paper, we try to find a new method to evaluate the system performance by simply analyzing the configuration contexts. With a C++ evaluation model constructed, we can extract the effective information from the configuration files and get the system performance rapidly, based on careful timing analysis. Experiments show that the evaluation model´s results and the simulation results match fairly well, and time cost will also be saved significantly, especially when the computing task grows more complex.
Keywords :
C++ language; microprocessor chips; performance evaluation; timing circuits; C++ evaluation model; configuration contexts; configuration files; performance evaluation; reconfigurable processor; system hardware; timing analysis; Arrays; Computational modeling; Context; Manuals;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157269
Filename :
6157269
Link To Document :
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