Impulse sampled intermittent polyphase SC FIR rational decimators with double-sampling

The conventional scheme for sampled-data analog decimation with rational conversion ratio of L/M(M>L) suffers from undesired distortion due to the input sample-and-hold filtering effect in the front interpolation stage. Two new impulse sampled SC FIR rational decimator architectures are proposed in this paper employing the efficient intermittent polyphase structures with Double-Sampled Active-Delayed Blocks (ADBs) which not only render them immune to the above distortion effect but also allow a significant relaxation of the amplifiers settling.