0.5 VDD digitally controlled oscillators design with compensation techniques for PVT variations

This paper presents a low voltage and low power digitally controlled oscillator (DCO) with not only wide frequency range and high frequency resolution but also compensation techniques against PVT variations. The frequency range of the 0.5 V_DD DCO, implemented in GP-65 nm LVT CMOS process, is from 278 MHz to 25 MHz for portable applications and consumes only 148 μW at 278 MHz and 28.5 μW at 25 MHz. Even in a dirty V_DD/GND condition, the peak-to-peak and RMS period jitter are 98.7 and 12.7 ps, respectively. In addition, with compensation techniques used in this work, the effective frequency range is increased by 1.786 times. As a result, compensation techniques in this work are very suitable for the demand of robust design, especially in low-voltage systems or wide PVT environments.