• DocumentCode
    3382586
  • Title

    Globally integrated power and clock distribution network

  • Author

    Jakushokas, Renatas ; Friedman, Eby G.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA
  • fYear
    2010
  • fDate
    May 30 2010-June 2 2010
  • Firstpage
    1751
  • Lastpage
    1754
  • Abstract
    The global networks within a conventional integrated circuits (IC) consists of three major types: power, ground, and clock networks. These three networks consumes most of the metal resources in the highest metal layers. The signals traversing the power and clock distribution networks are fundamentally different in terms of signal frequency and current flow. Combining the power and clock network into a globally integrated network is therefore possible. In this paper, the general concept of a globally integrated power and clock (GIPAC) system is proposed. The circuitry supporting this GIPAC system is also presented. Simulation results based on a 90 nm CMOS technology demonstrate the potential of GIPAC.
  • Keywords
    CMOS integrated circuits; clock distribution networks; distribution networks; integrated circuit interconnections; CMOS technology; conventional integrated circuits; globally integrated power and clock distribution network; CMOS technology; Circuit optimization; Circuit simulation; Clocks; Frequency; Integrated circuit interconnections; Integrated circuit technology; Low pass filters; Network-on-a-chip; Power system interconnection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4244-5308-5
  • Electronic_ISBN
    978-1-4244-5309-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.2010.5537570
  • Filename
    5537570