Title :
A CMOS 6 bit 250MS/s A/D converter with input voltage range detectors
Author :
Yoon, Kwang ; Kim, Won
Author_Institution :
Dept. of EE, Inha Univ., Incheon, South Korea
Abstract :
This paper proposes a CMOS 6 bit A/D converter with input voltage range detectors based upon folding amplifier with a folded-cascode load. The input voltage range detectors allow the proposed A/D converter to reduce the power dissipation by turning on one fourth of all the comparators. The measurement result illustrates ENOB of 5.1 bits at 250Msps, power dissipation of 106mW, and FoM of 17.5pJ/steps.
Keywords :
CMOS analogue integrated circuits; amplifiers; analogue-digital conversion; comparators (circuits); CMOS A/D converter; ENOB; comparators; folded-cascode load; folding amplifier; input voltage range detectors; power 106 mW; power dissipation; word length 6 bit; Arrays; CMOS integrated circuits; Clocks; Detectors; Frequency measurement; Linearity; Power dissipation; A/D conver; CMOS; comparator; input voltage range detector;
Conference_Titel :
SOC Conference (SOCC), 2010 IEEE International
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-6682-5
DOI :
10.1109/SOCC.2010.5784647
