A dual-phase charge pump regulator with nano-ampere switched-capacitor CMOS voltage reference for achieving low output ripples

In this paper, a regulated dual phase charge pump with switched-capacitor voltage reference is presented. This charge pump uses a dual phase technique to reduce the output ripple and combines the switch-capacitor CMOS voltage reference to diminish the chip area and quiescent current. This charge pump provides output voltage 5 V and maximum load current 5 mA with the constant frequency regulation. This design is based on TSMC 0.6 mum 5 V/12 V CMOS technology. The output ripples are reduced from 6.1 mV to 3.7 mV. Besides, the power consumption is minimized because of the integration of the nano-ampere CMOS reference voltage.