The impact of rate mismatch in ATM switch design

Author

Fulton, Cathy ; Li, San-qi ; Lin, Arthur

Author_Institution

NetQoS, Austin, TX, USA

Volume

3

fYear

1999

fDate

1999

Firstpage

1463

Abstract

This paper evaluates the buffer requirements resulting from rate mismatch in a 32×32 ATM switch with sixty OC-3 (155 Mbps) and four T-1 (1.5 Mbps) ports. Rate mismatch is expected to be a common occurrence in ATM wide area networks, particularly at the network seams. Without proper dimensioning, the switch buffers can rapidly overflow as a result of high-speed input traffic destined to a low-speed port. We specifically consider the Cisco Systems LightStream 1010 ATM switch architecture in our analysis, and compare the design options of a larger common shared buffer with that of adding buffers to each T-1 output port. We consider traffic from individual high-speed servers, LAN workstations, and aggregated Ethernet traffic

Keywords

asynchronous transfer mode; buffer storage; multiport networks; wide area networks; 32×32 ATM switch; ATM switch design; ATM wide area networks; Cisco Systems LightStream 1010 ATM switch architecture; LAN workstations; OC-3 port; T-1 port; aggregated Ethernet traffic; buffer requirements; dimensioning; high-speed input traffic; high-speed servers; network seams; rate mismatch; switch buffers; Asynchronous transfer mode; Engines; Ethernet networks; Intelligent networks; Local area networks; Switches; Telecommunication traffic; Traffic control; Wide area networks; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, 1999. ICC '99. 1999 IEEE International Conference on

Conference_Location

Vancouver, BC

Print_ISBN

0-7803-5284-X

Type

conf

DOI

10.1109/ICC.1999.765451

Filename

765451