Improvement on branch scheduling for VLIW architecture

Branch scheduling is an effective instruction scheduling technique to minimize branch penalty which is especially exhausting for VLIW architectures. In order to find out the most proper instructions for branch delay slots, the proposed algorithm built a cost model to evaluate candidate instructions for optimal choice. And a flow-sensitive data analysis framework is used to improve the accuracy of the scheme. The experimental result shows that, the proposed branch scheduling scheme reduces the executed cycles by 15% in average.