DocumentCode :
3383240
Title :
A security processor based on MIPS 4KE architecture
Author :
Wang, Shuai ; Li, Yang ; Liu, Junbao ; Han, Jun ; Zeng, Xiaoyang
Author_Institution :
State-Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
751
Lastpage :
754
Abstract :
This paper presents a security processor based on MIPS 4KE architecture which extends security functions of AES and ECC. Due to the different features of AES and ECC encryptions, two dedicated hardware units are employed. One is the AES function unit which is integrated into the pipeline of this MIPS-like processor, and the other is the ECC unit which works as a coprocessor to implement asymmetric cryptographic algorithms. Moreover, the instruction set extensions(ISE) of MIPS for these security functions are developed. Therefore, our security processor is not only able to handle high-intensity encryption tasks, but also compatible to the leading software development tools of industry. At last, its functionality and high performance are verified by our experimental chip.
Keywords :
coprocessors; cryptography; instruction sets; AES encryption; AES function unit; ECC encryption; ECC unit; MIPS 4KE architecture; MIPS-like processor; asymmetric cryptographic algorithm; coprocessor; hardware unit; high-intensity encryption task; instruction set extension; security function; security processor; Coprocessors; Elliptic curve cryptography; Encryption; Hardware; Logic gates; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157314
Filename :
6157314
Link To Document :
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