DocumentCode :
3383369
Title :
Low power SC CMFB folded cascode OTA optimization
Author :
Daoud, H. ; Bennour, S. ; Bensalem, S. ; Loulou, M.
Author_Institution :
Inf. Technol. & Electron. Lab., Nat. Eng. Sch. of Sfax, Sfax
fYear :
2008
fDate :
Aug. 31 2008-Sept. 3 2008
Firstpage :
570
Lastpage :
573
Abstract :
This paper describes a design of a switched capacitor common mode feedback (SC CMFB) folded cascode operational transconductance amplifier for low power and high-speed sigma-delta modulators. An algorithmic driven methodology is developed ending to the optimal transistor geometries. Using a 0.35 mum CMOS process, the OTA circuit has been designed to achieve 82.94 dB DC gain, 526 MHz unity-gain frequency, 560 V/mus slew rate with 1.8 V power supply voltage and a power consumption of only 1.19 mW. The simulated OTA circuit has been applied in a SC integrator to illustrate the versatility of the circuit.
Keywords :
CMOS analogue integrated circuits; integrating circuits; operational amplifiers; sigma-delta modulation; CMOS process; SC CMFB folded cascode OTA optimization; SC integrator; algorithmic driven methodology; folded cascode operational transconductance amplifier; frequency 526 MHz; gain 82.94 dB; power 1.19 mW; sigma-delta modulators; size 0.35 mum; switched capacitor common mode feedback; voltage 1.8 V; CMOS process; Capacitors; Circuits; Delta-sigma modulation; Feedback; Gain; Geometry; High power amplifiers; Operational amplifiers; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
Type :
conf
DOI :
10.1109/ICECS.2008.4674917
Filename :
4674917
Link To Document :
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