DocumentCode
3383415
Title
Experimental methodology for power characterization of FPGAs
Author
Herrera-Alzu, I. ; Sánchez, M.A. ; López-Vallejo, M. ; Echeverría, P.
Author_Institution
Dept. de Ing. Electron., Univ. Politec. de Madrid, Madrid
fYear
2008
fDate
Aug. 31 2008-Sept. 3 2008
Firstpage
582
Lastpage
585
Abstract
This paper presents an experimental methodology for power characterization of FPGAs. The approach provides a good trade-off among characterization time, cost and accuracy. Our solution is based on the use of an embedded power integrator built upon a low cost controller that provides accumulated power data over fixed time periods. Experimental results have shown suitability of the proposed methodology for different power characterization scenarios.
Keywords
field programmable gate arrays; FPGA; embedded power integrator; low cost controller; power characterization; Capacitance; Clocks; Control systems; Costs; Field programmable gate arrays; Leakage current; Logic programming; Performance evaluation; Power measurement; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location
St. Julien´s
Print_ISBN
978-1-4244-2181-7
Electronic_ISBN
978-1-4244-2182-4
Type
conf
DOI
10.1109/ICECS.2008.4674920
Filename
4674920
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