A differential read subthreshold SRAM bitcell with self-adaptive leakage cut off scheme

Leakage energy increases dramatically in subthreshold region because delay increases exponentially with decreasing supply voltage. Compared to generic logic, subthreshold SRAM blocks consume more leakage energy. However, all most previous subthreshold analyzes ignore the leakage current in both active operation and standby operation. To address this challenge, a differential read subthreshold SRAM is presented in this paper. Buffering circuit and reconfigurable operating principle ensure both read and standby stability without the expense of writability. Combined with dynamic cut off scheme, the leakage current of the proposed design is reduced remarkably in both active and standby operation without increasing dynamic energy dissipation or performance penalty.