DocumentCode
3383466
Title
Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects
Author
Braga, Matheus ; Cota, Erika ; Kastensmidt, Fernanda Lima ; Lubaszewski, Marcelo
Author_Institution
Inst. de Inf./Escola de Eng., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
4101
Lastpage
4104
Abstract
In this paper, a fault tolerance technique is proposed for the protection of NoC interconnects. The technique is based on data splitting and retransmission, providing for high NoC-based SoC reliability. For error detection, the proposed approach splits the communication data into two parity encoded halves. For error correction, only the erroneous half is doubled and retransmitted. Compared to the use of a conventional Hamming Code, we show that, for medium to large NoCs, the approach proposed in this work is less silicon costly, leads to the design of faster fault-free routers and, for the majority of faults, presents no performance degradation at system level.
Keywords
error correction; error detection; fault tolerance; integrated circuit design; integrated circuit interconnections; network-on-chip; Hamming code; NoC interconnects; SoC reliability; data splitting; error correction; error detection; fault tolerance technique; fault-free routers; network-on-chip interconnects; Communication channels; Degradation; Error correction; Error correction codes; Fault tolerance; Hardware; Network-on-a-chip; Redundancy; Silicon; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537611
Filename
5537611
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