DocumentCode :
3383523
Title :
Highly parallel multi-resource arbiters
Author :
Shang, Delong ; Xia, Fei ; Yakovlev, Alex
Author_Institution :
MSD Group, Newcastle Univ., Newcastle upon Tyne, UK
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
4117
Lastpage :
4120
Abstract :
Multi-resource multi-client arbiters are becoming more important in on-chip systems because of the increasing significance of dynamic, run-time, allocation of various system performance resources such as power and computation and communication facilities. Arbiters, for example, can be used to limit the amount of concurrency for regulating voltage droops, and for balancing load and traffic. This paper describes the design of multi-resource arbiters with high degrees of concurrency. By using freezing logic, this design method guarantees correct computation whilst simplifies the implementation. Quick release mechanisms and the implementation of the multi-token concept through the duplication of the client requests help improve the efficiency.
Keywords :
asynchronous circuits; logic design; freezing logic; high parallel multiresource multiclient arbiters; on-chip systems; voltage droop regulation; Concurrent computing; Design methodology; High performance computing; Logic design; Resource management; Runtime; System performance; System-on-a-chip; Telecommunication traffic; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537615
Filename :
5537615
Link To Document :
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