Synchronizing processors through memory requests in a tightly coupled multiprocessor

The Greedy network, an interconnection network (IN) for tightly coupled multiprocessors (TCMs), is introduced. An original and cost-effective hardware mechanism is proposed. When DSPA pipeline processors are connected with a shared memory through a Greedy network and synchronized by the authors´ synchronization mechanism, a very high parallelism may be achieved at execution time on a very large spectrum of loops, including loops where independency of the successive insertions cannot be checked at compile time