Theoretical and numerical investigation of SiC JFET and MOSFET at 6.5 kV

Author

Mihaila, A. ; Udrea, F. ; Azar, R. ; Liang, J. ; Amaratunga, G. ; Rusu, A. ; Brezeanu, G.

Author_Institution

Dept. of Eng., Cambridge Univ., UK

Volume

1

fYear

1999

fDate

1999

Firstpage

191

Abstract

This paper presents a preliminary theoretical and numerical investigation of 4H-SiC JFET and MOSFET at 6.5 kV. To improve the on-state/breakdown performance of the JFET, buried layers in conjunction with a highly doped buffer layer have been used. Trench technology has been employed for the MOSFET. The devices were simulated and optimized using the MEDICI simulator. From a comparison between the two devices, it turns out that the JFET offers a better on-state/breakdown trade-off, while the trench MOSFET has the advantage of MOS-control

Keywords

buried layers; heavily doped semiconductors; junction gate field effect transistors; power MOSFET; power field effect transistors; power semiconductor switches; semiconductor device breakdown; semiconductor device models; silicon compounds; wide band gap semiconductors; 4H-SiC JFET; 4H-SiC MOSFET; 6.5 kV; HVDC power switches; MEDICI simulator; MOS-control; SiC; breakdown voltage; buried layers; electric field distribution; high voltage high frequency applications; highly doped buffer layer; numerical investigation; on-state/breakdown performance; theoretical investigation; trench MOSFET; trench technology; Buffer layers; Doping; Electric breakdown; MOSFET circuits; Medical simulation; Power semiconductor switches; Semiconductor device breakdown; Silicon carbide; Surface resistance; Thermal conductivity;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 1999. CAS '99 Proceedings. 1999 International

Conference_Location

Sinaia

Print_ISBN

0-7803-5139-8

Type

conf

DOI

10.1109/SMICND.1999.810460

Filename

810460