Title :
Thermal-driven white space redistribution for block-level floorplans
Author :
Yan, Jin-Tai ; Chen, Zhi-Wei ; Chou, Yi-Hsiang ; Lin, Shun-Hua ; Chiueh, Herming
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Chung-Hua Univ., Hsinchu
fDate :
Aug. 31 2008-Sept. 3 2008
Abstract :
Given an LB-compact floorplan, a 3D block-level thermal model is firstly proposed to calculate the temperature of each circuit block in reasonable time. Furthermore, based on the temperature calculation in the proposed 3D block-level thermal model and the final floorplan region, an iterative approach is proposed to reduce the final floorplan temperature by inserting or redistribution the feasible white space. The experimental results show that our proposed iterative approach obtains very promising temperature reduction in reasonable CPU time for MCNC benchmarks.
Keywords :
circuit layout CAD; integrated circuit layout; iterative methods; LB-compact floorplan; MCNC; block-level floorplans; iterative approach; temperature reduction; thermal-driven white space redistribution; Capacitance; Computer science; Delay; Heat sinks; Integrated circuit interconnections; Iterative methods; Temperature; Thermal engineering; White spaces; Wire;
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
DOI :
10.1109/ICECS.2008.4674940
