DocumentCode :
3383834
Title :
Calibration of pipelined ADC gain and memory errors in an adaptively equalized receiver
Author :
Zhang, Mo M. ; Hurst, Paul J. ; Levy, Bernard C. ; Lewis, Stephen H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
4049
Lastpage :
4052
Abstract :
This paper presents a method to calibrate the gain and memory errors of a pipelined analog-to-digital converter (ADC) used in an adaptively equalized baseband receiver. Both types of errors degrade ADC linearity, which significantly limits overall system performance. Adaptive finite-impulse-response filters at the output of each pipeline stage correct gain and memory errors and also perform channel equalization. The least-mean-square (LMS) algorithm is used to adapt the filter coefficients. The objective is to minimize the mean square error across the sheer in the receiver. Simulation results are presented to demonstrate improved performance with calibration.
Keywords :
FIR filters; adaptive filters; analogue-digital conversion; equalisers; least mean squares methods; receivers; LMS algorithm; adaptive finite-impulse-response filters; adaptively-equalized baseband receiver; analog-to-digital converter; channel equalization; least mean square algorithm; memory errors; pipelined ADC gain; Adaptive equalizers; Adaptive filters; Analog-digital conversion; Baseband; Calibration; Degradation; Linearity; Performance gain; Pipelines; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537631
Filename :
5537631
Link To Document :
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