Reliability analysis of logic circuits based on signal probability

This paper presents a reliability analysis algorithm that can be integrated in the design flow of logic circuits. Based on a four state representation of signal probabilities, and the propagation of this probabilities along the cells of a circuit, the signal reliability of the circuit can be directly obtained. The use of signal probabilities rises the well known problem of signals correlation, and we present some relaxing conditions that allow tradeoffs between accuracy and execution time of the algorithm. The main advantages of the proposed methodology are its simplicity and straightforward application, allowing an easy integration with design tools.