DocumentCode
3383883
Title
Thermal modelling of 3D multicore systems in a flip-chip package
Author
Vaddina, Kameswar Rao ; Mitra, Tamoghna ; Liljeberg, Pasi ; Plosila, Juha
Author_Institution
Turku Center for Comput. Sci. (TUCS), Turku, Finland
fYear
2010
fDate
27-29 Sept. 2010
Firstpage
379
Lastpage
383
Abstract
Three-dimensional (3D) technology offers greater device integration, reduced signal delay and reduced interconnect power. It also provides greater design flexibility by allowing heterogeneous integration. In this work, a 3D thermal model of a multicore system is developed to investigate the effects of hotspot, and placement of silicon die layers, on the thermal performance of a modern flip-chip package. In this regard, both the steady-state and transient heat transfer analysis has been performed on the 3D flip-chip package. Two different thermal models were evaluated under different operating conditions. Through experimental simulations, we have found a model which has better thermal performance. The optimal placement solution is also provided based on the maximum temperature attained by the individual silicon dies. We have also provided the improvement that is required in the heat sink thermal resistance of a 3D system when compared to the single-die system.
Keywords
flip-chip devices; multiprocessing systems; thermal management (packaging); three-dimensional integrated circuits; 3D flip-chip package; 3D multicore systems; 3D thermal model; heat sink thermal resistance; heterogeneous integration; single-die system; thermal modelling; three-dimensional technology; Heat sinks; Heat transfer; Resistance heating; Silicon; Thermal resistance; Three dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2010 IEEE International
Conference_Location
Las Vegas, NV
ISSN
Pending
Print_ISBN
978-1-4244-6682-5
Type
conf
DOI
10.1109/SOCC.2010.5784700
Filename
5784700
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