Title :
A novel multiplying D/A converter stage with low sensitivity to amplifier gain
Author :
Isa, Erkan Nevzat ; Morche, Dominique ; Dehollain, Catherine
Author_Institution :
CEA, MINATEC, Grenoble, France
fDate :
May 30 2010-June 2 2010
Abstract :
A multiplying D/A converter stage incorporating a novel technique for compensating the residual error due to finite amplifier gain is proposed. The scheme is suitable for deep-submicron CMOS technologies and is advantageous compared to the available correlated double sampling techniques because it neither doubles the size of the sampling capacitance, nor requires processing of the same input signal twice for cancelling the residual error at the virtual ground. The conducted behavioral simulations confirm the efficiency of the proposed technique applied to a pipelined A/D converter.
Keywords :
CMOS digital integrated circuits; amplifiers; analogue-digital conversion; digital-analogue conversion; error compensation; multiplying circuits; behavioral simulations; correlated double sampling techniques; deep-submicron CMOS technology; finite amplifier gain; multiplying D/A converter stage; pipelined A/D converter; residual error cancellation; residual error compensation; sampling capacitance; virtual ground; Bandwidth; CMOS technology; Capacitance; Capacitors; Energy consumption; Power amplifiers; Signal processing; Signal sampling; Virtual reality; Voltage;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537635
