DocumentCode
3384150
Title
Design for testability of FFT/IFFT IP core for UWB systems
Author
Su, Weilu ; Shi, Longzhao
Author_Institution
Coll. of Phys. & Inf. Eng., Fuzhou Univ., Fuzhou, China
fYear
2011
fDate
25-28 Oct. 2011
Firstpage
914
Lastpage
917
Abstract
This paper presents design for testability of FFT/IFFT IP core with CAD tools. As demanding market require ever more complex, faster and denser circuits, high quality tests become essential to meet design specifications in terms of reliability, time-to-market, costs, etc. No solution other than design-for-test can achieve acceptable fault to detect physical fails for highly integrated systems. Within this context, an overview and analysis of existing test methods is given in this paper. And the architecture of FFT is introduced and appropriate test methods are chosen to realize design for test of FFT/IFFT IP core. As a result, the design with high fault coverage needing less test time is achieved.
Keywords
design for testability; integrated circuit design; integrated circuit testing; ultra wideband technology; CAD tools; FFT/IFFT IP core; UWB systems; design for testability; highly integrated systems; reliability; time-to-market; Arrays; Built-in self-test; Couplings; Design automation; Legged locomotion; Logic gates; Random access memory; Built-In-Self-Test; DFT; FFT/IFFT;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location
Xiamen
ISSN
2162-7541
Print_ISBN
978-1-61284-192-2
Electronic_ISBN
2162-7541
Type
conf
DOI
10.1109/ASICON.2011.6157354
Filename
6157354
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