DocumentCode :
3384245
Title :
A 60GHz power amplifier using 90-nm RF-CMOS technology
Author :
Zhang, Nan ; Sun, Lingling ; Wen, Jincai ; Liu, Jun ; Lou, Jia ; Su, Guodong ; Li, He
Author_Institution :
Key Lab. for RF Circuits & Syst. of Minist. of Educ., Hangzhou Dianzi Univ., Hangzhou, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
933
Lastpage :
936
Abstract :
A 60GHz power amplifier (PA) is presented, using a 90-nm RF-CMOS process with 8 metal-layers. To the inductor provided by process, the Quality factor (Q value) is quite low and the model is inaccurate in millimeter-wave (MMW) design. Transmission lines (T-lines) can be modeled directly due to their inherent scalability in width and length, which is easy to realize accurate values of small reactance by T-lines. This paper uses coplanar waveguide (CPW) to realize accurate values of small reactance as well as the interconnect lines. The amplifier operates at a 1.1 V supply with 9.56 dB of power gain. The output 1dB compression point (P1dB) is +8.04 dBm with 10.2% of Power Add Efficiency (PAE), and the saturation output power (PSAT) is +11.48 dBm at 60GHz. Besides, the 3dB-band is more than 8.6 GHz (54.88 GHz-63.53 GHz). The chip occupies an area of 1099 μm × 433 μm.
Keywords :
CMOS integrated circuits; Q-factor; coplanar waveguides; power amplifiers; RF-CMOS process; RF-CMOS technology; coplanar waveguide; frequency 60 GHz; inductor; metal layers; millimeter-wave design; power add efficiency; power amplifier; quality factor; size 90 nm; transmission lines; voltage 1.1 V; CMOS integrated circuits; CMOS technology; Coplanar waveguides; Inductors; Integrated circuit modeling; MOSFET circuits; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157359
Filename :
6157359
Link To Document :
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