The design and verification of SEU-hardened configurable DFF

This paper presents a circuit-level radiation hardened structure with the function of anti-SBU, anti-MBU and anti-SET. At the same time, the paper proposes a fast and accurate method to simulate SEU effects by using TCAD and Cadence. What´s more, a comparison between the proposed structure and structures in literatures proves the proposed one´s superiority in the circuit performance, area, power consumption and other aspects with the usage of the proposed testing method. Moreover, the proposed structure is applied to the configurable DFF in FPGA to certificate its practicality and portability. While keeping the primary advantages such as well-performed and configurable ability, the hardened DFF has a strong anti-radiation performance with a LET threshold of more than 100MeV·cm²/mg, which is identified to be immune to SEU.