Title :
Data link design using a time-based approach
Author :
Rashdan, Mostafa ; Yousif, Abdel ; Haslett, James ; Maundy, Brent
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
fDate :
May 30 2010-June 2 2010
Abstract :
A time-based approach to SerDes data transfer is described. As proof of concept, 2-bit 800 Mbps and 3-bit 1.2 Gbps time-based serial links have been designed and implemented using an Altera transceiver signal integrity development FPGA kit. The eye diagram of both the transmitted signal and the signal at the end of a 40-inch FR4 trace have been measured and compared for both links. The transmitted code has been successfully recovered at the receiver side.
Keywords :
field programmable gate arrays; transceivers; Altera transceiver signal integrity; FPGA kit; SerDes data transfer; bit rate 1.2 Gbit/s; bit rate 800 Mbit/s; data link design; eye diagram; time-based approach; time-based serial links; word length 2 bit; word length 3 bit; CMOS technology; Counting circuits; Frequency; Noise reduction; Noise shaping; Phase locked loops; Quantization; Ring oscillators; Sampling methods; Working environment noise;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537664
