DocumentCode
3384608
Title
Estimation of maximum application-level power supply noise
Author
Wu, Tung-Yeh ; Sambamurthy, Sriram ; Abraham, Jacob A.
Author_Institution
Comput. Eng. Res. Center, Univ. of Texas at Austin, Austin, TX, USA
fYear
2010
fDate
27-29 Sept. 2010
Firstpage
213
Lastpage
218
Abstract
This paper presents a systematic technique that relates the instructions at the application-level to the cycle-average supply noise. Cost metrics affecting supply noise are maximized and the corresponding activity event is mapped to instructions. We performed experiments on an open-source processor and were able to obtain a higher voltage drop (>;20%) when compared to that of random simulation in a significantly less amount of time (96% reduction).
Keywords
noise; power supply circuits; cost metrics; cycle-average supply noise; maximum application-level power supply noise; open-source processor; Resistance; Resists;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2010 IEEE International
Conference_Location
Las Vegas, NV
ISSN
Pending
Print_ISBN
978-1-4244-6682-5
Type
conf
DOI
10.1109/SOCC.2010.5784738
Filename
5784738
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