DocumentCode :
3384686
Title :
Fast logic restructuring exploring fanout-reconvergent structures and extended symmetry detections
Author :
Yang, Xiaoqing ; Wu, Yu-Liang
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of HK, Hong Kong, China
fYear :
2009
fDate :
23-25 July 2009
Firstpage :
1113
Lastpage :
1118
Abstract :
Rewiring is a logic restructuring technique proved to possess a theoretically complete capability for logic transformations. This technique can be even more powerful if well integrated with today´s EDA flow for deep-submicron technology where wiring delay well dominates. In this paper, we will show that a structural factor yielding rewiring patterns is probably mainly rooted from the nature of fanout-reconvergent structures abundant in combinational Boolean networks. Here, we analyze the implication properties for such fanout-reconvergent structures for quick identifications of alternative wires together with an extended symmetry detection scheme for finding more swappable wires. In this fast rewiring engine, the number of alternative wires found can be over 50% of that found by an extensive ATPG-based rewiring tool, REWIRE; however with an only 2% runtime.
Keywords :
Boolean functions; automatic test pattern generation; combinational circuits; EDA flow; combinational Boolean network; deep-submicron technology; extended symmetry detection scheme; extensive ATPG-based rewiring tool; fanout-reconvergent structure; logic restructuring technique; logic transformation; rewiring pattern; Automatic test pattern generation; Circuits; Delay; Electronic design automation and methodology; Engines; Logic; Redundancy; Runtime; Wires; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location :
Milpitas, CA
Print_ISBN :
978-1-4244-4886-9
Electronic_ISBN :
978-1-4244-4888-3
Type :
conf
DOI :
10.1109/ICCCAS.2009.5250321
Filename :
5250321
Link To Document :
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