• DocumentCode
    3384689
  • Title

    Thermal estimation for accurate estimation of impact of BTI aging effects on nano-scale SRAM circuits

  • Author

    Shah, Ankitchandra ; Mahmoodi, Hamid

  • Author_Institution
    Sch. of Eng., San Francisco State Univ., San Francisco, CA, USA
  • fYear
    2010
  • fDate
    27-29 Sept. 2010
  • Firstpage
    230
  • Lastpage
    235
  • Abstract
    Temperature and power are interrelated. With increase in temperature, power dissipation increases and vice versa. This paper analyzes the interdependency of power dissipation and temperature and also presents simulation results obtained by deriving the final power and temperature for nano-scale SRAM circuits with any environmental condition. Given the strong temperature dependence of BTI aging effects, accurate temperature estimation is an important step in determining the impact of aging effects on SRAM. As an example, the thermal estimation for a conventional SRAM and a power gated SRAM are performed to show the comparative impact of BTI aging effects on both the circuits.
  • Keywords
    SRAM chips; ageing; circuit simulation; circuit stability; nanoelectronics; power aware computing; BTI aging effect impact estimation; bias temperature instability; impact estimation; nanoscale SRAM circuit; power dissipation; power gated SRAM; static random access memory; temperature estimation; thermal estimation; Logic gates; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2010 IEEE International
  • Conference_Location
    Las Vegas, NV
  • ISSN
    Pending
  • Print_ISBN
    978-1-4244-6682-5
  • Type

    conf

  • DOI
    10.1109/SOCC.2010.5784741
  • Filename
    5784741