A 0.8-3GHz 40dB dynamic range CMOS variable-gain amplifier

Author

Huang, Xingli ; Qin, Xi ; Qin, Yajie ; Fang, Hao ; Hong, Zhiliang

Author_Institution

State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China

fYear

2011

fDate

25-28 Oct. 2011

Firstpage

1030

Lastpage

1033

Abstract

A wideband variable gain amplifier which provides 40dB dynamic gain range using dual-loop feedback Cherry-Hooper topology is presented. A modified negative capacitive neutralization technique is proposed to improve the frequency response with a reasonable cost of power consumption. This VGA is implemented in SMIC 0.13μm 1P8M CMOS technology, and occupies 0.3 mm² active area. The measurement results show that its -3dB bandwidth is from 800MHz to 3GHz. It consumes 21.6 mW at 1.2V power supply. The maximum input P_1dB with a preceding LNA is -27dBm at an overall gain of -0.5dB.

Keywords

CMOS analogue integrated circuits; circuit feedback; frequency response; low noise amplifiers; network topology; power consumption; wideband amplifiers; CMOS variable-gain amplifier; Cherry-Hooper topology; LNA; SMIC 1P8M CMOS technology; VGA; dual-loop feedback; frequency 0.8 GHz to 3 GHz; frequency response; gain -0.5 dB; gain 40 dB; negative capacitive neutralization technique; power 21.6 mW; power consumption; size 0.13 mum; voltage 1.2 V; wideband variable gain amplifier; Gain measurement; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2011 IEEE 9th International Conference on

Conference_Location

Xiamen

ISSN

2162-7541

Print_ISBN

978-1-61284-192-2

Electronic_ISBN

2162-7541

Type

conf

DOI

10.1109/ASICON.2011.6157383

Filename

6157383