• DocumentCode
    3385015
  • Title

    Resource constrained mapping of data flow graphs onto coarse-grained reconfigurable array

  • Author

    Jing, Naifeng ; He, Weifeng ; Mao, Zhigang

  • Author_Institution
    Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China
  • fYear
    2010
  • fDate
    27-29 Sept. 2010
  • Firstpage
    260
  • Lastpage
    265
  • Abstract
    This paper proposes a heuristic algorithm to the resource constrained mapping problem in coarse-grained reconfigurable computing, such that the partition number and communications are co-optimized to improve the application performance. Our approach modifies the network flow algorithm with a customized mapping procedure embedded to satisfy the micro-architecture resource constraints. Additionally, we use integer linear programming to set optimal baseline to the problem. Our algorithms reformulate the cost function by identifying some flaws in previous literatures. The experiment results qualify the benefit gained by our proposed approach.
  • Keywords
    data flow graphs; integer programming; linear programming; logic arrays; logic design; reconfigurable architectures; coarse grained reconfigurable array; coarse grained reconfigurable computing; data flow graph; heuristic algorithm; integer linear programming; microarchitecture resource constraint; network flow algorithm; resource constrained mapping; Arrays; Discrete cosine transforms; Flow graphs; Heuristic algorithms; Optimization; Partitioning algorithms; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2010 IEEE International
  • Conference_Location
    Las Vegas, NV
  • ISSN
    Pending
  • Print_ISBN
    978-1-4244-6682-5
  • Type

    conf

  • DOI
    10.1109/SOCC.2010.5784756
  • Filename
    5784756