Title :
Design of a high-linearity RF front-end with IP2 calibration for SAW-less WCDMA receivers
Author :
Hu, Song ; Li, Weinan ; Huang, Yumei ; Hong, Zhiliang
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
A fully integrated receiver RF front-end designed in 0.13μm CMOS that meets the WCDMA system requirements is presented. The receiver RF front-end requires no interstage SAW filter. To handle the stringent linearity requirements in terms of both IP3 and IP2 set for the RF front-end, a current-mode passive mixer constructing a built-in high-Q bandpass filter is adopted to suppress blockers including the transmitter leakage, and an IP2 calibration circuit is applied to the mixer. A new start-up circuit is proposed for the operational amplifier in the transimpedance amplifier. To generate the quadrature clocks, a three-stage RC polyphase filter is used. The measurement results show that, owing to this high-linearity RF front-end, the receiver achieves -15dBm IIP3 and +72dBm IIP2, which satisfies the WCDMA SAW-less requirements.
Keywords :
band-pass filters; calibration; code division multiple access; current-mode circuits; mixers (circuits); operational amplifiers; radio receivers; radio transmitters; CMOS; IP2 calibration circuit; IP3 set; SAW-less WCDMA receiver; blocker suppression; built-in high-Q bandpass filter; current-mode passive mixer; high-linearity RF front-end design; integrated receiver RF front-end; operational amplifier; quadrature clock generation; size 0.13 mum; start-up circuit; three-stage RC polyphase filter; transimpedance amplifier; transmitter leakage; CMOS integrated circuits; Calibration; Current measurement; Mixers; Noise measurement; Radio frequency; Receivers;
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
DOI :
10.1109/ASICON.2011.6157398