• DocumentCode
    3385054
  • Title

    Impacts of the MTCMOS technology on power supply network: a full-chip perspective

  • Author

    Shi, Jin ; Cai, Yici

  • Author_Institution
    Dept.of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
  • fYear
    2009
  • fDate
    23-25 July 2009
  • Firstpage
    996
  • Lastpage
    999
  • Abstract
    Multi-threshold CMOS(MTCMOS) has been developed as one of the most efficient techniques to reduce leakage power. However, sleep transistor insertion might impose problems on power supply network design. We studied IR-drop variance by sleep transistor insertion at the full-chip level. Our work covered different modes, structures and tapping patterns. We identified in most cases the varied current distribution can be balanced locally well. Besides, ldquorush currentrdquo can have large and wide impacts.
  • Keywords
    CMOS integrated circuits; current distribution; power supply circuits; IR-drop variance; full-chip perspective; leakage power reduction; multithreshold CMOS technology; power supply network design; sleep transistor insertion; Analytical models; CMOS technology; Computer science; Current distribution; Electronic design automation and methodology; Emergency power supplies; Energy consumption; Leakage current; Power supplies; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
  • Conference_Location
    Milpitas, CA
  • Print_ISBN
    978-1-4244-4886-9
  • Electronic_ISBN
    978-1-4244-4888-3
  • Type

    conf

  • DOI
    10.1109/ICCCAS.2009.5250338
  • Filename
    5250338