Title :
Residue arithmetic bases for reducing delay variation
Author :
Kouretas, I. ; Paliouras, V.
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece
fDate :
May 30 2010-June 2 2010
Abstract :
In this paper the utilization of Residue Number System (RNS) is investigated as a tool for variation-tolerant design. In particular circuits using various RNS bases are compared in terms of their sensitivity to the variation of process parameters. Furthermore, RNS advantages are quantitatively illustrated by considering a timing model. It is shown that for bases where all moduli channels are candidates to contain the critical path of the RNS circuit, the delay variation is reduced upto 86% when compared to the equivalent binary structures.
Keywords :
residue number systems; delay variation; equivalent binary structures; moduli channels; residue arithmetic bases; residue number system; timing model; variation-tolerant design; Adders; Cathode ray tubes; Circuits; Data processing; Delay; Design engineering; Digital arithmetic; Large-scale systems; Logic; Timing; RNS; Residue arithmetic; arithmetic circuits; variation-tolerant design;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537692
