DocumentCode
3385145
Title
A novel verifying system of USB2.0 IP core for SoC applications
Author
Shi, Shengqing ; Luo, Rong
Author_Institution
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
fYear
2009
fDate
23-25 July 2009
Firstpage
1010
Lastpage
1013
Abstract
Based on the software ISE and EDK, a verification system of USB2.0 IP core which is designed in the authors´ lab for system-on-a-chip (SoC) application is proposed. The top-level design is in the ISE and an embedded sub-module is included in the ISE top project. The C code for operating the IP core is also done. All the work is downloaded to FPGA board, so the correctness of the IP core is verified.
Keywords
field programmable gate arrays; logic design; peripheral interfaces; system-on-chip; C code; FPGA board; SoC application; USB2.0 IP core; system-on-a-chip; Application software; Communication system control; Control systems; Field programmable gate arrays; Logic; Master-slave; Protocols; Registers; System-on-a-chip; Universal Serial Bus;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location
Milpitas, CA
Print_ISBN
978-1-4244-4886-9
Electronic_ISBN
978-1-4244-4888-3
Type
conf
DOI
10.1109/ICCCAS.2009.5250342
Filename
5250342
Link To Document