Title :
A new VLSI architecture implementation for H.264 decoder
Author :
Zhang, Chi ; Liu, Bu-Ming
Author_Institution :
Sch. of Microelectron. & Solid State Electron., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
in this paper, a new flexible VLSI architecture of H.264/AVC decoder is presented. The proposed design implementation can get a good performance result as fully pipelined construction.
Keywords :
VLSI; decoding; flexible electronics; video coding; H.264-AVC decoder; advanced video coding; flexible VLSI architecture implementation; pipelined construction; Application software; Automatic voltage control; Bandwidth; Consumer electronics; Decoding; Entropy; Hardware; High definition video; Very large scale integration; Video coding;
Conference_Titel :
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location :
Milpitas, CA
Print_ISBN :
978-1-4244-4886-9
Electronic_ISBN :
978-1-4244-4888-3
DOI :
10.1109/ICCCAS.2009.5250348
