De Bruijn graph based 3D Network on Chip architecture design

Network on chip (NoC) is an on-chip communication methodology proposed to resolve the increased interconnection problem in system in chip (SoC). Since the three dimensional (3D) integrated circuit (IC) can offer shorter interconnection wire for network on chip, 3D NoC becomes an emerging research area in recent years. The architecture of 3D NoC is one of the most important and fundamental issues in 3D NoC research area, since it plays an important roll in network latency, throughput, power consumption, application mapping, and chip complexity. In this paper, we propose a new architecture based on De Bruijn graph for 3D NoC, since De Bruijn graph is a topology with small diameter, simple routing and high reliability. We evaluate this architecture with two Mesh based architectures. The simulation result shows that the De Bruijn graph based architecture can achieve smaller network latency than Mesh based architectures.