DocumentCode :
3385751
Title :
Improving the Digital Design with Semi-formal Specification
Author :
Torres-Roman, D.
Author_Institution :
ITESO, Guadalajara, Mexico
fYear :
2006
fDate :
27-01 Feb. 2006
Firstpage :
55
Lastpage :
55
Abstract :
In this work, an improvement of the traditional design methodology is proposed. The major change is the use of semi-formal specification for the implementation and the establishment of properties for the formal verification. From semi-formal specification, assertions were written using Property Specification Language (PSL) for an alignment circuit. Finally, a set of properties for the verification of this module were established and proved using two verification tools. Our statistics proved that, considerable design time was saved, and the number of versions was low.
Keywords :
Assertion based verification; assertions; model checking tools; properties; semiformal specification; Circuits; Computer science; Costs; Design engineering; Design methodology; Formal verification; Hardware design languages; Specification languages; Statistics; Testing; Assertion based verification; assertions; model checking tools; properties; semiformal specification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Communications and Computers, 2006. CONIELECOMP 2006. 16th International Conference on
Print_ISBN :
0-7695-2505-9
Type :
conf
DOI :
10.1109/CONIELECOMP.2006.34
Filename :
1604751
Link To Document :
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