DocumentCode
3385971
Title
A low power high performance design for JPEG Huffman decoder
Author
Tsai, Kun-Lin ; Lan, Paul ; Ruan, Shanq-Jang ; Shie, Mou-Chau
Author_Institution
Dept. of Electr. Eng., TungHai Univ., Taichung
fYear
2008
fDate
Aug. 31 2008-Sept. 3 2008
Firstpage
1151
Lastpage
1154
Abstract
JPEG image codec is one of the most commonly used standards for communication and storage applications. In this paper, we propose a simple and successful design for a JPEG alternating current Huffman decoder with low power and high performance considerations. Based on the parallel Huffman decoder structure, we utilize the bipartition architecture on the lookup table to reduce power consumption without sacrificing decoding performance. Gate level power simulation results show a maximum of 25% power reduction can be obtained when compared with the conventional JPEG parallel Huffman decoder.
Keywords
Huffman codes; data compression; decoding; image coding; JPEG Huffman decoder; JPEG image codec; bipartition architecture; gate level power simulation; Clocks; Communication standards; Decoding; Energy consumption; Entropy coding; Huffman coding; Image coding; Image storage; Table lookup; Transform coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location
St. Julien´s
Print_ISBN
978-1-4244-2181-7
Electronic_ISBN
978-1-4244-2182-4
Type
conf
DOI
10.1109/ICECS.2008.4675062
Filename
4675062
Link To Document