DocumentCode :
3386083
Title :
An H.264/AVC MP@L4.1 quarter-pel motion estimation processor VLSI for real-time MBAFF encoding
Author :
Mizuno, Kosuke ; Miyakoshi, Junichi ; Murachi, Yuichiro ; Hamamoto, Masaki ; Iinuma, Takahiro ; Ishihara, Tomokazu ; Yin, Fang ; Lee, Jangchung ; Kawaguchi, Hiroshi ; Yoshimoto, Masahiko
Author_Institution :
Dept. of Comput. Sci. & Syst. Eng., Kobe Univ., Kobe
fYear :
2008
fDate :
Aug. 31 2008-Sept. 3 2008
Firstpage :
1179
Lastpage :
1182
Abstract :
This paper describes an H.264/AVC MP@L4.1 quarter-pel motion estimation processor core for a low power video encoder. It supports macro block adaptive frame field (MBAFF) encoding and bi-directional prediction for a resolution of 1920 times 1080 pixels at 30 fps which havenpsilat been realized by conventional methods yet. The proposed processor consists of four modules for low power consumption: a module for an integer-pel motion estimation, a segmentation-free rectangle-access search window buffer, a module for quarter-pel motion estimation, and a module reducing candidate motion vectors. We propose an adaptive algorithm that reduces a workload and power in quarter-pel motion estimation. The algorithm and architecture for the candidate motion vectors reduction suppress a workload of the following process. The processor core has been designed in a 90 nm CMOS technology. The core size is 6.0 times 6.0 mm2. With this core, two reference frame can be handled, and 160.1 mW is consumed at 1.0 V.
Keywords :
CMOS digital integrated circuits; VLSI; adaptive codes; block codes; microprocessor chips; motion estimation; video coding; CMOS technology; H.264/AVC; MP@L4.1 quarter-pel motion estimation processor core; VLSI; bidirectional prediction; candidate motion vectors reduction module; integer-pel motion estimation; low power video encoder; macroblock adaptive frame field encoding; real-time MBAFF encoding; segmentation-free rectangle-access search window buffer; Algorithm design and analysis; Automatic voltage control; CMOS technology; Computer science; Cyclic redundancy check; Encoding; Motion estimation; Power engineering and energy; Real time systems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
Type :
conf
DOI :
10.1109/ICECS.2008.4675069
Filename :
4675069
Link To Document :
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