DocumentCode :
338615
Title :
New procedures for identifying undetectable and redundant faults in synchronous sequential circuits
Author :
Reddy, Sudhakar M. ; Pomeranz, Irith ; Lin, Xijiang ; Basturkmen, Nadir Z.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear :
1999
fDate :
1999
Firstpage :
275
Lastpage :
281
Abstract :
We present three new procedures for identifying undetectable and redundant faults in synchronous sequential circuits. The procedures use an iterative logic array of limited length, into which faults are injected in different ways. The proposed procedures help identify undetectable and redundant faults that cannot be identified by existing procedures based on iterative logic arrays of limited length
Keywords :
automatic testing; fault diagnosis; integrated circuit testing; logic arrays; logic testing; redundancy; sequential circuits; array length; fault injection; iterative logic array; redundant faults; synchronous sequential circuits; undetectable faults; Circuit faults; Circuit testing; Cities and towns; Computer graphics; Electrical fault detection; Fault diagnosis; Logic arrays; Sequential analysis; Sequential circuits; Synchronous generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA
ISSN :
1093-0167
Print_ISBN :
0-7695-0146-X
Type :
conf
DOI :
10.1109/VTEST.1999.766676
Filename :
766676
Link To Document :
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