A flexible algorithmic ADC for wireless sensor nodes

This paper presents the behavioral level modeling and circuit implementation of a flexible algorithmic ADC that can be used for Bluetooth and CDMA2000-1X receivers, and sensor applications. An accurate behavioral level model of the ADC has been implemented in Matlab/Simulink, including the most important circuit non-idealities. This model allows exhaustive behavioral simulations, to achieve an optimal design. The accurate behavioral model shows that a dynamic range of 60 dB can be achieved for a bandwidth up to 1.25 Mega Samples Per Second (MSPS), which is sufficient for Bluetooth and CDMA2000-1X standards, and medium resolution sensors. The highest achievable sampling rate is 2.8 MSPS. The transistor level implementation of the ADC in a 0.35 mum CMOS process shows that the analog part of the ADC consumes 11 mW of power from a 3.3 V supply.