• DocumentCode
    3386286
  • Title

    Design of a pulse stream neural network

  • Author

    Haycock, R.J. ; York, T.A.

  • Author_Institution
    Dept. of Electr. Eng. & Electron., Univ. of Manchester Inst. of Sci. & Technol., UK
  • Volume
    2
  • fYear
    1997
  • fDate
    3-6 Aug. 1997
  • Firstpage
    1053
  • Abstract
    A BiCMOS, asynchronous, pulse-stream neuron chip and a CMOS, asynchronous, pulse-stream synapse chip have been designed. The neuron chip uses novel circuitry to implement an accurate sigmoid transfer characteristic. The synapse chip uses a new pulse-stream implementation of the differential amplifier and requires only five transistors to produce a linear multiplier. Training has been performed in software using ideal models of the neurons and synapses.
  • Keywords
    BiCMOS integrated circuits; CMOS integrated circuits; differential amplifiers; mixed analogue-digital integrated circuits; multiplying circuits; neural chips; BiCMOS; CMOS; asynchronous neuron chip; differential amplifier; ideal models; linear multiplier; pulse stream neural network; sigmoid transfer characteristic; synapse chip; Artificial neural networks; Biological neural networks; Biological system modeling; Circuits; Computer networks; Fault tolerance; Neural networks; Neurons; Pulse amplifiers; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
  • Print_ISBN
    0-7803-3694-1
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1997.662258
  • Filename
    662258