DocumentCode :
3386399
Title :
Track and hold circuit design and implementation in 65 nm CMOS technology for RF subsampling receivers
Author :
Darraji, Ramzi ; Barrak, Rim ; Rebai, Chiheb ; Ghazel, Adel ; Deval, Yann ; Ghannouchi, Fadhel
Author_Institution :
Ecole Super. des Commun., Ariana
fYear :
2008
fDate :
Aug. 31 2008-Sept. 3 2008
Firstpage :
1249
Lastpage :
1252
Abstract :
In this paper, two track and hold circuits are designed and implemented using 65 nm CMOS technology. The first circuit is based on a dummy switch topology to decrease the charge injection error. The second circuit uses a clock linearization technique to reduce the sampling instant inaccuracy. Simulation results show that the track and hold circuit based on dummy transistor technique presents the best performances in terms of rapidity and accuracy.
Keywords :
CMOS integrated circuits; network synthesis; network topology; radio receivers; CMOS technology; RF subsampling receivers; charge injection error; circuit design; clock linearization technique; dummy switch topology; dummy transistor technique; CMOS technology; Circuit simulation; Circuit synthesis; Circuit topology; Clocks; Linearization techniques; Radio frequency; Sampling methods; Switches; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location :
St. Julien´s
Print_ISBN :
978-1-4244-2181-7
Electronic_ISBN :
978-1-4244-2182-4
Type :
conf
DOI :
10.1109/ICECS.2008.4675086
Filename :
4675086
Link To Document :
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