DocumentCode :
3386501
Title :
Improved method to realize the multiplex time-domain interleaver
Author :
Yanting, Li ; Lu, Si ; Weizhang, Xu ; Zhanxin, Yang
Author_Institution :
Eng. Center of Digital Audio & Video, Commun. Univ. of China, Beijing, China
Volume :
2
fYear :
2009
fDate :
28-29 Nov. 2009
Firstpage :
322
Lastpage :
325
Abstract :
This paper proposes a FPGA design of variable parameter interleaver based on the time-domain convolutional interleaver. Synchronous dynamic random access memory (SDRAM) is adopted in the design. According to different interleave-depth and configuration parameters, the memory of SDRAM is assigned dynamically. The result of the simulation is shown at the end of the paper.
Keywords :
DRAM chips; field programmable gate arrays; interleaved storage; multiplexing; FPGA design; configuration parameter; interleave depth; multiplex time-domain interleaver; synchronous dynamic random access memory; time-domain convolutional interleaver; variable parameter interleaver; Broadcast technology; Convolutional codes; Digital audio broadcasting; Digital multimedia broadcasting; Encoding; Multimedia communication; Multimedia systems; Parity check codes; SDRAM; Time domain analysis; Convolutional Interleaver; FPGA; SDRAM; T-MMB;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Industrial Applications, 2009. PACIIA 2009. Asia-Pacific Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-4606-3
Type :
conf
DOI :
10.1109/PACIIA.2009.5406594
Filename :
5406594
Link To Document :
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