Title :
A built-in self-test method for write-only content addressable memories
Author_Institution :
Intel Corp., Hudson, MA, USA
Abstract :
A novel and pragmatic built-in self test technique provides cost-effective and thorough testing and diagnosis of content addressable memories (CAMS). The method is particularly attractive for write-only CAMS, as neither the presence of a read port nor direct observability of CAM match-lines are required or testing. The underlying test algorithm uniquely exploits little known inherent properties of pseudorandom patterns generated by linear feedback shift registers in a test-time and hardware-efficient BIST implementation.
Keywords :
built-in self test; circuit feedback; content-addressable storage; integrated circuit testing; integrated memory circuits; shift registers; BIST; CAM diagnosis; CAM matchlines; built-in self-test method; linear feedback shift registers; pseudorandom pattern generation; test algorithm; write-only content addressable memories; Associative memory; Automatic testing; Built-in self-test; CADCAM; Cams; Computer aided manufacturing; Linear feedback shift registers; Logic arrays; Observability; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
Print_ISBN :
0-7695-2314-5