Title :
Transition tests for high performance microprocessors
Author :
Chang, Yi-Shing ; Chakravarty, Sreejit ; Hoang, Hiep ; Thorpe, Nick ; Wee, Khen
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
The scope and need for scan based transition tests in the context of high volume manufacturing testing of microprocessors is discussed. A classification of transition faults for latch based design is presented. Finally, we discuss a silicon experiment to understand the most fundamental issue of scan based transition testing viz. their robustness.
Keywords :
fault diagnosis; integrated circuit manufacture; integrated circuit testing; microprocessor chips; high performance microprocessors; high volume manufacturing testing; latch based design; robustness; scan based transition testing; silicon experiment; transition fault classification; transition tests; Automatic test pattern generation; Cost function; Flip-flops; Manufacturing; Microprocessors; Robustness; Semiconductor device modeling; Silicon; Test pattern generators; Testing;
Conference_Titel :
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
Print_ISBN :
0-7695-2314-5
DOI :
10.1109/VTS.2005.87
